The present invention relates to a display in which when a variety of video signals different in scanning frequency from each other are received in an alternative way, it is possible to automatically determine a suitable picture size and a suitable picture position (display position) corresponding to the scanning frequency to thereby display a picture with the optimum picture size and picture position on a display screen.
A conventional display such as a terminal of a computer, or the like, has no defined standard with respect to a video signal to be displayed thereon, and therefore there exist a variety of video signals to be displayed which are different from each other in horizontal scanning frequency, vertical frequency, timing of display size, etc. Accordingly, a variety of displays having a variety of specifications corresponding to the various video signals are produced. Accordingly, the displays must be manufactured through multi-kind and small-quantity production with extremely poor productivity. Recently, however, there has been proposed a single display capable of accommodating such a variety of video signals to be displayed. This display has been called a multi-scanning display.
As examples of such a conventional multi-scanning display, there are those disclosed, for example, in Japanese Patent Unexamined Publication Nos. 61-199381, 61-108265, etc.
Referring to the drawings, those conventional multi-scanning displays will be described.
FIG. 20A is a block diagram showing the configuration of a horizontal deflection circuit of a first prior art example of such a multi-scanning display. In FIG. 20A, the horizontal deflection circuit includes a horizontal oscillating circuit 181 externally fed with a horizontal synchronizing signal HS, a horizontal driving circuit 182, a horizontal output circuit 183a, a control circuit 184 for controlling the circuits 181, 182, and 183a, and a flyback transformer 185.
The horizontal oscillating circuit 181 changes its oscillation frequency in response to a control signal fed from the control circuit 184. To this end, the control circuit 184 generates a control signal corresponding to the specification such as a scanning frequency of a video signal to be fed to the display so as to be displayed thereon. The control circuit further feeds control signals also to the horizontal output circuit 183a. In the horizontal output circuit 183a, those control signals are used to perform the control of the on/off operation of a characteristic change-over switch SW1 connected in parallel to an additional capacitor C.sub.1 which is in turn connected to a resonance capacitor C.sub.0, and the control of the on/off operation of another characteristic change-over switch SW2 connected in parallel to an additional coil L.sub.1 which is in turn connected to a horizontal deflection coil L.sub.0.
Thus, it is possible to maintain the ratio of a horizontal scanning period T.sub.s to a horizontal blanking period T.sub.r fixed, for example, between the cases where the horizontal oscillation frequency of the horizontal oscillating circuit 181 is selected to be f.sub.1 and f.sub.2 by the control circuit 184. Accordingly, it is possible to make the horizontal raster size fixed. The explanation about the horizontal output circuit 183a applies to another horizontal output circuit 183b shown in FIG. 20B and quite the same operation is performed in this circuit.
The above relationship in the case where the horizontal oscillation frequency is changed over may be expressed by the following equations. That is, with respect to the horizontal oscillation frequency f.sub.1, the relationship among the horizontal scanning period T.sub.sl, the horizontal blanking period T.sub.rl and the deflection current I.sub.pl is expressed as follows. ##EQU1## where +V.sub.B represents the source voltage of the horizontal output circuit.
Similarly to this, with respect to the horizontal oscillation frequency f.sub.2, the relationship among the horizontal scanning period T.sub.s2, the horizontal blanking period T.sub.rl and the deflection current I.sub.p2 is expressed as follows. ##EQU2## where +V.sub.B represents the source voltage of the horizontal output circuit. The respective values of the additional capacitor C.sub.1 and the additional coil L.sub.1 are selected so as to satisfy the above conditions. As the result, it is possible to make the horizontal raster size fixed with respect to video signals having known horizontal oscillation frequencies. In the case where a video signal having an unexpected oscillation frequency is fed, the horizontal raster size changes.
FIG. 21 is a block diagram showing the configuration of a vertical deflection circuit of a second prior art example of the multi-scanning display. In FIG. 21, the vertical deflection circuit includes an input terminal 190 to which a vertical synchronizing signal (VS) is fed, a vertical oscillating circuit (V. OSC) 191 for performing saw-tooth wave oscillation, a capacitor 192, a variable current source 193, comparators (COM) 194 and 195, an exclusive OR gate (hereinafter abbreviated to "EOR") 196, an up/down counter (hereinafter abbreviated to "UDC") 197 for performing counting in response to a vertical synchronizing signal (VS) applied thereto as a clock, a digital-to-analog converter (hereinafter abbreviated to "DAC") 198, a vertical output circuit 199, a deflection yoke 1910, a capacitor 1911, a resistor 1912, variable resistors 1913 and 1914, a change-over switch 1915, a change-over control circuit 1916, and an input terminal 1917 to which a selection signal (SL) is fed.
The operation of the circuit of FIG. 21 is as follows. When the vertical synchronizing signal (VS) is fed to the input terminal 190 of the vertical oscillating circuit 191, the capacitor 192 is discharged by the variable current source 193 so that saw-tooth wave oscillation is carried out. The waveform of the oscillation is controlled so that the amplitude thereof falls within a predetermined range. Assume now that the respective reference levels of the comparators 194 and 195 are selected so that the former is higher than the latter. Then, when the oscillation amplitude is not higher than the reference level of the comparator 195, the UDC 197 is fed with a count-up control signal so as to increase the count data thereof. At this time, the output signal of the DAC 198 increases and the current value of the variable current source 193 increases. As the result, the oscillation amplitude of the saw-tooth wave becomes large. When the oscillation amplitude is not lower than the reference level of the comparator 194, the UDC 197 is set to a down counter so as to decrease the count data thereof. At this time, the output signal of the DAC 198 decreases and the current value of the variable current source 193 decreases. As the result, the oscillation amplitude of the saw-tooth wave becomes small. Further, when the oscillation amplitude takes a value within a range between the respective levels of the comparators 194 and 195, the UDC 197 is fed with the output signal of the EOR 196 so that the counting thereof is inhibited.
In such a manner as described above, a sawtooth wave signal having an amplitude within a predetermined range is fed to one input (positive phase input) of the operational-amplifier type vertical output circuit 199, and vertical raster having a predetermined display size can be obtained from the vertical deflection yoke. The capacitor 1911 and the resistor 1912 are connected in series to the vertical deflection yoke and the variable resistors 1913 and 1914 are connected in parallel to the resistor 1912. One of the variable resistors 1913 and 1914 is selected by the switch 1915 so that the output of the selected one of the variable resistors 1913 and 1914 is fed through the switch 1915 to the other input (reverse phase input) of the vertical output circuit 199. By the variable resistors 1913 and 1914, the vertical size is selectively changed over to either one of the respective preset values of the variable resistors 1913 and 1914 in accordance with the control signal SC from the change-over control circuit 1916. Thus, a desirable effective display rate can be obtained. Further, the change-over control circuit 1916 is controlled by the signal SL fed from a main control circuit (not shown).
However, in actual video signals, not only the vertical frequency of the vertical synchronizing signal (VS) but the vertical display size are diverse. Accordingly, in the case where such a video signal is fed, it is necessary to control the resistance values of the respective variable resistors 1913 and 1914 again so as to obtain a desirable effective display ratio.
Further, there has been proposed a display in which it is not necessary for a user to adjust the display size and display position every time when the video signal to be fed changes. As a third prior art example of such a display, there is that disclosed, for example, in Japanese Utility Model Unexamined Publication No. 62-156990.
FIG. 22 is a block diagram showing a display as the third prior art example. In FIG. 22, the display includes a reception circuit 221 for receiving video signals, a video system circuit 222 for processing a video signal, a cathode ray tube (CRT) 223, a video system circuit 222 having selection switches for selecting the video signals, input ports 225 and input port 227, a control circuit 226, a horizontal and vertical deflection circuit 228, a memory 229, and an output port 2211, a procedure memory 2212 for storing an operation routine, and a DAC 2213.
The operation of the circuit illustrated in FIG. 22 is as follows. Assume that a plurality of video signals are fed to the reception circuit 221. One of those video signals is selected by one of the switches of the first input circuit 224, and the selected video signal is fed to the video system circuit 222. The selection switches of the first input circuit 224 and the video signals have one-to-one correspondency therebetween. More specifically, if a user selects, for example, a first one of the selection switches, a first one of the video signals is selected in the reception circuit 221. The information from the first selection switch is fed to the control circuit 226 through the input port 225. In response to the thus fed information, the control circuit 226 reads out various control signals corresponding to the first video signal from the memory 229 and supplies the readout control signals to the output port 2211 and the DAC 2213.
The output port 2211 feeds the control signal and information to the video system circuit 222 and the horizontal and vertical deflection circuit 228. The DAC 2213 feeds information to the horizontal and vertical deflection circuit 228. In this manner, corresponding to the first video signal, a circuit within the video system circuit 222 and a circuit within the horizontal and vertical deflection circuit 228 are selected and a picture of the first video signal is displayed on the cathode ray tube 223 with desirable horizontal and vertical display sizes and at a desirable display position.
Similarly to the above operation with respect to the first video signal, the second or third selection switch is selected for the second or third video signal and the same operation as in the case of the first video signal is carried out.
Further, a selection signal (SL), a horizontal synchronizing signal (HS) and a vertical synchronizing signal (VS) are fed to the input port 227. The characteristics of those signals may be judged in the control circuit 226 so that this operation is substituted for the above-mentioned selection function.
In such a prior art display as described above, however, unless the selection order in the input portion (the input port 225 and the first input circuit 224) and the video signals to be fed have one-to-one correspondency, erroneous control signals are read out and a desired display picture cannot be obtained. Accordingly, it is necessary to perform the connection necessary for selecting the fed video signals in correct order. Further, in order to obtain a display size and a display position in an optimum manner, it is necessary that all the video signals to be fed have known specifications respectively. Further, since optimum circuits are selected with respect to the horizontal and vertical deflection circuit 228 and the video system circuit 222, there is a possibility that erroneous selecting operation is performed when a video signal having an unknown specification as to a scanning frequency and a synchronizing signal is fed.
Further, in the horizontal and vertical deflection circuit 228, several kinds of circuit constants are selectively changed over. Accordingly, the above horizontal and vertical deflection circuit 228 becomes impossible to cope with a video signal having an unexpected specification, while it can cope with a video signal having a known specification. In order to make the horizontal and vertical deflection circuit 228 cope with such a video signal having an unexpected specification, it is necessary to control the circuit constants of the horizontal and vertical deflection circuit 228 again. Moreover, since change-over operation is performed, the circuit operation is apt to become unstable and the circuit may be damaged in the worst case.